Database query processing with network acceleration
The goal of this project is to investigate distributed query co-processing between the database system and the network hardware. In distributed query processing, the movement of large amounts of data through the memory hierarchy can negatively impact the performance and energy consumption of the database system.
While the network component typically has the lowest performance in the memory hierarchy, recent hardware developments have introduced low-latency data access comparable to local memory. These advances have also made it possible to program and run complex data processing operations on network switches. For example, programing in P4 language.
When a packet is received, the pipeline begins by parsing the packet and creating a state machine. During processing, the metadata and data of the packets trigger state transitions to determine the packet forwarding. The processing logic for packet ingress and egress is located in the MAU pipelines which consist of match and action logics. A combination of MAUs constitutes the network data plane used to transmit user packets and implement various network protocols or, in the context of query processing, query operations. The control plane is a software-based centralized controller that coordinates how the packets should be processed hence enabling the functions in the data plane. Generally speaking, a P4 program defines the objects installed in the data plane like the state machine, routing tables and match-action logics, and the compiler generates the API that the control plane uses to communicate with the data plane.
The Figure below shows the P4 packet processing pipeline.
However, the limitations of the P4 switch programming language poses difficult research questions that drive our research agenda. Reach out to delve deeper into this topic.
Our project is based on results that we published in the most prestigious international conferences in the database area, such as VLDB, ICDE, EDBT, DATE, CIKM and DEXA, as well as DB hardware workshops, such as: ADMS@ VLDB, Damon@SIGMOD, PhD@VLDB and SIGMOD-Research Competition. The results also received awards for best doctoral thesis by CAPES 2021, runner up thesis by SBC 2021 and ACM SIGMOD 2023. The expected results of this project involve algorithms, methodologies and proposals for hardware extensions that can be implemented by the DBMS industry and hardware manufacturers
This project is supported by CNPq and the SmartEdge project.
Links CNPq: https://www.gov.br/cnpq/pt-br
SmartEdge: https://www.smart-edge.eu